In computer architecture, 31-bit integers, memory addresses, or other data units are those that are 31 bits wide.

In 1983, IBM introduced 31-bit addressing in the System/370-XA mainframe architecture as an upgrade to the 24-bit physical and virtual,[1] and transitional 24-bit-virtual/26-bit physical,[2][3] addressing in System/370.[4][5] This enhancement allowed address spaces to be 128 times larger, permitting programs to address memory above 16 MB (referred to as "above the line").[6][1] Support for COBOL, FORTRAN and later on Linux/390 were included.

In the early 1980s, the Motorola 68012 was introduced; it had 32-bit data and address registers, as the Motorola 68010 did, but instead of providing the lower 24 bits of an address on the address pins, it provided all but bit 30 on the address pins.[7]

31-bit computer

The Librascope LGP-30 was an early off-the-shelf computer. The LGP-30 was first manufactured in 1956,[8] at a retail price of $47,000, equivalent to $510,000 in 2022.[9]

It was a binary, 31-bit word computer with a 4096-word drum memory. There were 32 bit locations per drum word, but only 31 were used, permitting a "restoration of magnetic flux in the head" at the 32nd bit time. The number of vacuum tubes was minimized by using solid-state diode logic, a bit-serial architecture and multiple use of each of its 15 flip-flops.

The LGP-30 was commonly referred to as a desk computer. Its height, width, and depth, excluding the typewriter shelf, was 33 by 44 by 26 inches (84 by 112 by 66 cm). It weighed about 800 pounds (360 kg), and was mounted on sturdy casters which facilitated moving the unit.

IBM mainframes with 31-bit addressing

In the System/360, other than the 360/67, and early System/370 architectures, the general-purpose registers were 32 bits wide, the machine did 32-bit arithmetic operations, and addresses were always stored in 32-bit words, so the architecture was considered 32-bit, but the machines ignored the top 8 bits of the address resulting in 24-bit addressing.

With the System/370-XA architecture and the IBM Enterprise Systems Architecture, in addition to a 24-bit addressing mode for compatibility with older applications, there is a 31-bit addressing mode, in which only the high order bit (bit 0) in the word is ignored for addressing. An exception is that mode-switching instructions also use bit 0. There were at least two reasons that IBM did not implement the 32-bit addressing of the 360/67

  1. The loop control instructions BXH and BXLE did signed comparisons.
  2. Much of the existing software used bit 0 as an end-of-list indicator.[10]

The 64-bit z/Architecture also supports 24-bit and 31-bit addressing modes for compatibility with older applications.

Ruby & Smalltalk

Interpreters for Ruby & Smalltalk languages use the lowest bit to tell whether a value is an unboxed integer or not. This means that on 32-bit machines (or 16-bit machines with 32-bit pointers), 31-bit integers are unboxed. In case of overflow, the result is fit into a boxed object, which means that it has to be allocated and garbage-collected. Thus if you have 32-bit values that don't fit in the 31-bit signed format, they will be very inefficient in those interpreters. Same goes with 63-bit unboxed integers on 64-bit computers. Similar designs may be found in LISP and some of the other languages whose variables can take values of any type. In some cases, there was hardware support for this kind of design: see Tagged architecture and Lisp machine.

References

  1. 1 2 "A brief history of virtual storage and 64-bit addressability". IBM.
  2. ↑ "with transitional support for 26-bit"
  3. ↑ KE Plambeck (2002). "Development and attributes of z/Architecture"" (PDF).
  4. ↑ Robert T. Fertig (May 1983). "XA: The View From The Trenches (pp.122-136)". Datamation.
  5. ↑ Ronald L. Bond (May 1983). "XA: The View From White Plains (pp.139–152)". Datamation.
  6. ↑ "...to run in the 31-bit area above the line,... "Rewriting to run in 31 bit area". Computerworld. October 27, 1986. p. 13.
  7. ↑ "4.1 SIGNAL DESCRIPTION" (PDF). MC68010/MC68012 16-/32-Bit Virtual Memory Microprocessors (PDF). Motorola Semiconductor. May 1985. pp. 4-1–4-2. ADI942R2. {{cite book}}: |work= ignored (help)
  8. ↑ "1950-1959 Librazettes". www.librascopememories.com. Archived from the original on 2014-12-27. Retrieved 2018-03-19. Librazette: July, 1956 – Royal Precision Plans – LGP-30 Promotion; November, 1956 – LGP-30, Flow Computer Spearhead – Commercial Sales and Production – They're In Production and Paul Coates Will Feature LGP-30 on Dec. TVshows
  9. ↑ 1634–1699: McCusker, J. J. (1997). How Much Is That in Real Money? A Historical Price Index for Use as a Deflator of Money Values in the Economy of the United States: Addenda et Corrigenda (PDF). American Antiquarian Society. 1700–1799: McCusker, J. J. (1992). How Much Is That in Real Money? A Historical Price Index for Use as a Deflator of Money Values in the Economy of the United States (PDF). American Antiquarian Society. 1800–present: Federal Reserve Bank of Minneapolis. "Consumer Price Index (estimate) 1800–". Retrieved May 28, 2023.
  10. ↑ "... the high order bit in the last fullword must be set to one to indicate the end of the list." "WAIT — Wait for one or more events". IBM.
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